Verification Techniques for System-Level Design 在線電子書 pdf 下載 txt下載 epub 下載 mobi 下載 2024

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Fujita, Masahiro/ Ghosh, Indradeep/ Prasad, Mukul 作者

譯者

2007-11 出版日期

256 頁數

$ 108.42 價格

叢書系列

9780123706164 圖書編碼

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發表於2024-11-10

Verification Techniques for System-Level Design 在線電子書 epub 下載 mobi 下載 pdf 下載 txt 下載 2024

Verification Techniques for System-Level Design 在線電子書 epub 下載 pdf 下載 mobi 下載 txt 下載 2024

Verification Techniques for System-Level Design 在線電子書 pdf 下載 txt下載 epub 下載 mobi 下載 2024

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Verification Techniques for System-Level Design 在線電子書圖書描述

This book will explain how to verify SoC logic designs using 'formal' and 'semi-formal' verification techniques. The critical issue to be addressed is whether the functionality of the design is the one that the designers intended. Simulation has been used for checking the correctness of SoC designs (as in 'functional' verification), but many subtle design errors cannot be caught by simulation. Recently, formal verification, giving mathematical proof of the correctness of designs, has been getting much more attention. So far, most of the books on formal verification target the register transfer level (RTL) or lower levels of design. For higher design productivity, it is essential to debug designs as early as possible. That is, designs should be completely verified at very abstracted design levels (higher than RTL). This book covers all aspects of high-level formal and semi-formal verification techniques for system level designs. This is the first book that covers all aspects of formal and semi-formal, high-level (higher than RTL) design verification targeting SoC designs. It features formal verification of high-level designs (RTL or higher). Verification techniques are discussed with associated system-level design methodology.

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