SystemVerilog for Verification 在線電子書 圖書標籤: verification testbench tech-software ic FPGA
發表於2024-12-29
SystemVerilog for Verification 在線電子書 pdf 下載 txt下載 epub 下載 mobi 下載 2024
讀這本書太費勁瞭,英文讀不懂,中文更讀不懂。把asic-world.com上systemverilog的例子全做一遍,結閤著讀這部書會好一點,一點個人體會。
評分不會吧,連這書都有? 好想把它讀懂……
評分不會吧,連這書都有? 好想把它讀懂……
評分@Quietstream要offer
評分讀這本書太費勁瞭,英文讀不懂,中文更讀不懂。把asic-world.com上systemverilog的例子全做一遍,結閤著讀這部書會好一點,一點個人體會。
SystemVerilog for Verification teaches the reader how to use the power of the new SystemVerilog testbench constructs plus methodology without requiring in-depth knowledge of Object Oriented Programming or Constrained Random Testing. The book covers the SystemVerilog verification constructs such as classes, program blocks, C interface, randomization, and functional coverage. SystemVerilog for Verification also reviews some design topics such as interfaces and array types. There are extensive code examples and detailed explanations. The book will be based on Synopsys courses, seminars, and tutorials that the author developed for SystemVerilog, Vera, RVM, and OOP. Concepts will be built up chapter-by-chapter, and detailed testbench using these topics will be presented in the final chapter. SystemVerilog for Verification concentrates on the best practices for verifying your design using the power of the language.
To read this book, you should have basic knowledge of Verilog. There are many examples in this book, very easy to understand. It's an introduction book for SystemVerilog Verification. If you want learn the language in depth, go IEEE1800 or VMM. You should...
評分正在读,先记录一下感受。 翻译的基本上还可以。就我读过的专业书籍来说,算是平均之上吧。 能看得出来翻译的人是业内人士,而且对书中的例子大概也进行了调试,否则不会出现改动原书的代码的状况。 在第八章我已经发现了至少两个地方对原书代码的改动。很不幸的是,都改错了...
評分To read this book, you should have basic knowledge of Verilog. There are many examples in this book, very easy to understand. It's an introduction book for SystemVerilog Verification. If you want learn the language in depth, go IEEE1800 or VMM. You should...
評分正在读,先记录一下感受。 翻译的基本上还可以。就我读过的专业书籍来说,算是平均之上吧。 能看得出来翻译的人是业内人士,而且对书中的例子大概也进行了调试,否则不会出现改动原书的代码的状况。 在第八章我已经发现了至少两个地方对原书代码的改动。很不幸的是,都改错了...
評分the best book of introducing verifcation using SV. It is worth taking a careful look. And you should run all the codes by yourself with VCS/NC/modelsim
SystemVerilog for Verification 在線電子書 pdf 下載 txt下載 epub 下載 mobi 下載 2024