Jos´e Duato received his M.S. and Ph.D. degrees in electrical engineering from the Technical University of Valencia (Universidad Polit´ecnica de Valencia), Spain, in 1981 and 1985, respectively.

Currently, Dr. Duato is a professor in the Department of Computer Engineering (DISCA),

Universidad Polit´ecnica de Valencia, and adjunct professor in the Department of Computer and Information Science, Ohio State University.

His current research interests include high-speed interconnects, multiprocessor architectures, cluster architectures, and IP routers. Dr. Duato proposed the first theory of deadlock-free adaptive routing for wormhole networks. This theory has been used in the design of the routing algorithms

for the MIT Reliable Router, the Cray T3E router, and the on-chip router of the Alpha 21364 microprocessor. Dr.Duato is currently collaboratingwithIBMon the design of the interconnection network for the IBMBlueGene/L supercomputer and on the next generation of the IBM PRIZMA switch for IP routers.

Dr. Duato has served as an associate editor for the IEEE Transactions on Parallel and

Distributed Systems and IEEE Transactions on Computers. He has been the general co-chair for the 2001 International Conference on Parallel Processing. Also, he served as co-chair, member of the steering committee, vice-chair, or member of the program committee in more than 30 conferences, including the most prestigious conferences in his field (HPCA, ISCA, IPPS/SPDP, ICPP, ICDCS, Europar, HiPC).

Sudhakar Yalamanchili received his B.E. degree in electronics from Bangalore University, India, in 1978, and his M.S. and Ph.D. degrees in electrical and computer engineering from the University of Texas at Austin in 1980 and 1984, respectively.

He was a senior and then principal research scientist at the Honeywell Systems and Research Center in Minneapolis from 1984 to 1989, where he was the principal investigator for projects in the design and analysis of multiprocessor architectures for embedded applications. Since 1989 he has been on the faculty at the Georgia Institute of Technology, where he is currently professor

of electrical and computer engineering. He is the author of the texts VHDL Starter’s Guide and IntroductoryVHDL: From Simulation to Synthesis from Prentice Hall (2000).His current research interests lay in the intersection of system area networks, configurable computing technologies, and

high-speed switching and routing. His current projects focus on the development of high-speed switching substrates for supporting data intensive communication.

Dr. Yalamanchili is a member of the ACM and senior member of the IEEE. He has served

as an associate editor for the IEEE Transactions on Parallel and Distributed Systems and IEEE Transactions on Computers and serves on program committees for international conferences in

the area of high-performance computing systems.

Lionel M. Ni earned his Ph.D. degree in electrical and computer engineering from Purdue University,WestLafayette, IN, in 1980.Heis a professor in the Computer Science andEngineering Department at Michigan State University. His research interests include parallel architectures, distributed systems, high-speed networks, and pervasive computing.A fellow of IEEE, Dr. Ni has

chaired many professional conferences and received a number of awards for authoring outstanding papers. His paper (with Chris Glass) “The Turn Model for Adaptive Routing” was selected as one

of the 41 most significant impact papers in the last 25 years in computer architecture in 1998. He also won the Michigan State University Distinguished Faculty Award in 1994.

Dr.Ni has served as an associate editor for the IEEE Transactions on Parallel and Distributed Systems and IEEE Transactions on Computers.

In the five years since this book was originally published, rapid evolution of digital technology has made the material in this book even more relevant. Now, in 2002, even more than in 1997, wires and interconnect determine the performance, power, and cost of modern digital systems.

Point-to-point interconnection networks have replaced buses in an ever widening range of applications that includes on-chip interconnect, switches and routers, and I/O

systems. The emerging standards of Infiniband and RapidIO are built around the concept of using a network to interconnect one or more processors with an array of I/O devices.

Companies such as Sonics build on-chip interconnection networks—sometimes called

micronetworks. The use of interconnection networks as the fabric of a router or switch

has been pioneered by Avici, Pluris, and others.

Interconnection networks have become pervasive in their traditional application as

processor-memory and processor-processor interconnect. Interconnection networks are

now used even in modest size machines for these applications. The new material in this

printing on the network of the Compaq Alpha 21364 represents the best practice in this

area.

Just as it did when it was first published in 1997, this book provides the student or practicing engineer with a well-organized, comprehensive treatment of the field of interconnection networks. Material that was previously scattered across hundreds of research papers has been collected, organized, and presented in a coherent format. In an era when digital systems design is dominated by interconnect, every digital designer needs to understand the concepts of topology, routing, and flow control on which interconnection networks are based. There is no better way for an engineer to come up to speed on interconnection networks than by reading this book.