CMOS Circuit Design, Layout, and Simulation, Revised Second Edition 在线电子书 pdf 下载 txt下载 epub 下载 mobi 下载 2024


CMOS Circuit Design, Layout, and Simulation, Revised Second Edition

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R. Jacob Baker 作者
Wiley-IEEE Press
译者
2007-11-9 出版日期
1072 页数
USD 129.95 价格
Hardcover
丛书系列
9780470229415 图书编码

CMOS Circuit Design, Layout, and Simulation, Revised Second Edition 在线电子书 图书标签: cmos  IC  英文原版  layout   


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发表于2024-11-27


CMOS Circuit Design, Layout, and Simulation, Revised Second Edition 在线电子书 epub 下载 mobi 下载 pdf 下载 txt 下载 2024

CMOS Circuit Design, Layout, and Simulation, Revised Second Edition 在线电子书 epub 下载 mobi 下载 pdf 下载 txt 下载 2024

CMOS Circuit Design, Layout, and Simulation, Revised Second Edition 在线电子书 pdf 下载 txt下载 epub 下载 mobi 下载 2024



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CMOS Circuit Design, Layout, and Simulation, Revised Second Edition 在线电子书 著者简介

Russel Jacob (Jake) Baker (S’83-M’88-SM’97) was born in Ogden, Utah, on October 5, 1964. He received the B.S. and M.S. degrees in electrical engineering from the University of Nevada, Las Vegas, in 1986 and 1988. He received the Ph.D. degree in electrical engineering from the University of Nevada, Reno in 1993.

From 1981 to 1987, he served in the United States Marine Corps Reserves. From 1985 to 1993, he worked for E. G. & G. Energy Measurements and the Lawrence Livermore National Laboratory designing nuclear diagnostic instrumentation for underground nuclear weapons tests at the Nevada test site. During this time he designed over 30 electronic and electro-optic instruments including high-speed (750 Mb/s) fiber-optic receiver/transmitters, PLLs, frame- and bit-syncs, data converters, streak-camera sweep circuits, Pockell’s cell drivers, micro-channel plate gating circuits, and analog oscilloscope electronics. From 1993 to 2000, he served on the faculty in the department of electrical engineering at the University of Idaho on the Boise State campus. In 2000, he joined a new electrical and computer engineering program at Boise State University, where he served as department chair from 2004 to 2007. At Boise State he helped establish graduate programs in electrical and computer engineering including, in 2006, the university’s second PhD degree. Also, since 1993, he has consulted for various companies and laboratories including: Aerius Photonics, Arete’ Associates, Amkor, Contour Semiconductor, the Lawrence Berkeley Laboratory, Micron, Nascentric, Oracle, Rendition, Sun, and Tower. His research interests lie in analog/mixed-signal integrated circuit design (combining analog circuit design with digital signal processing) and the design of memory/displays/imagers (arrays) in new and emerging fabrication technologies.

Jake holds over 200 granted or pending patents in integrated circuit design. Among his inventions is the K-Delta-1-Sigma modulator topology used in the Baker analog-to-digital converter. He is a member of the electrical engineering honor society Eta Kappa Nu, a licensed Professional Engineer, and the author of the books CMOS Circuit Design, Layout, and Simulation, CMOS Mixed-Signal Circuit Design, and a coauthor of DRAM Circuit Design: Fundamental and High-Speed Topics. He received the 2000 Best Paper Award from the IEEE Power Electronics Society, the 2007 Frederick Emmons Terman Award, and the 2011 IEEE Circuits and Systems (CAS) Education Award. Jake currently serves on the IEEE Solid-State Circuits Society Administrative Committee (AdCom) and as editor for the Wiley-IEEE Press book Series on Microelectronic Systems.


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CMOS Circuit Design, Layout, and Simulation, Revised Second Edition 在线电子书 图书描述

Winner of the Frederick Emmons Terman Award CMOS: Circuit Design, Layout, and Simulation, Revised Second Edition covers the practical design of both analog and digital integrated circuits, offering a vital, contemporary view of a wide range of analog/digital circuit blocks, the BSIM model, data converter architectures, and much more. This edition takes a two-path approach to the topics: design techniques are developed for both long- and short-channel CMOS technologies and then compared. The results are multidimensional explanations that allow readers to gain deep insight into the design process. Features include: Updated materials to reflect CMOS technology's movement into nanometer sizes Discussions on phase- and delay-locked loops, mixed-signal circuits, data converters, and circuit noise More than 1,000 figures, 200 examples, and over 500 end-of-chapter problems In-depth coverage of both analog and digital circuit-level design techniques Real-world process parameters and design rules The book's Web site, CMOSedu.com, provides: solutions to the book's problems; additional homework problems without solutions; SPICE simulation examples using HSPICE, LTspice, and WinSpice; layout tools and examples for actually fabricating a chip; and videos to aid learning

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